- מיקום
- כל הארץ
- היקף משרה
- משרה מלאה
- תפקיד
- מהנדס/ת חומרה ואלקטרוניקה
תיאור המשרה
Responsibilities:
Implementation of ASIC units using advanced flows
- Developing BackEnd methodology using Cadence and Synopsys tools
- Build and develop scripts for physical design implementation
- Support Field team with customer issues
Requirements:
- 4-8 years of hands-on experience with ASIC physical design %28RTL-to-GDS%29.
- Proven experience taking multiple full-chip SoCs from RTL through tapeout.
- Deep knowledge of Cadence and/or Synopsys backend flows %28experience with both is a strong plus%29.
- Strong understanding of PnR, timing closure, SI, power, DRC/LVS, and signoff.
- Excellent debugging and problem-solving skills.
- Strong scripting skills in TCL and Python.
Nice-to-have / Advantage
- Experience with multiple power domains and low-power design techniques.
- Background that spans both frontend %28RTL%29 andbackend.
- Experience influencing or defining methodology across teams or projects.
