Senior FPGA Engineer

You will be developing FPGA based AI inference systems that will break today’s power per token limits.

You will be working closely with system architects, algorithm engineers and Software developers. You will have to be familiar with all the system components and will take part in the implementation, integration and debug of this highly complex system. 

Key Responsibilities:

• Design and implement FPGA/RTL components for high-performance AI inference systems
• Develop and optimize data-path logic, including streaming, buffering, arbitration, and flow-control mechanisms
• Work closely with system architects, algorithm engineers, and software developers to translate system requirements into FPGA implementations
• Participate in the full FPGA development cycle, including design, simulation, synthesis, timing closure, integration, and validation
• Integrate FPGA blocks with processors, memory subsystems, DMA engines, and other system components
• Debug complex hardware and system-level issues using simulation and on-chip debugging tools
• Analyze performance, latency, throughput, and resource utilization, and optimize designs accordingly
• Define and maintain interfaces, register maps, constraints, and design documentation
• Support hardware/software integration and bring-up of FPGA-based prototypes and platforms
• Contribute to architectural and design decisions for next-generation AI inference systems

Requirements:

• Design and implement FPGA/RTL components for high-performance AI inference systems
• Develop and optimize data-path logic, including streaming, buffering, arbitration, and flow-control mechanisms
• Work closely with system architects, algorithm engineers, and software developers to translate system requirements into FPGA implementations
• Participate in the full FPGA development cycle, including design, simulation, synthesis, timing closure, integration, and validation
• Integrate FPGA blocks with processors, memory subsystems, DMA engines, and other system components
• Debug complex hardware and system-level issues using simulation and on-chip debugging tools
• Analyze performance, latency, throughput, and resource utilization, and optimize designs accordingly
• Define and maintain interfaces, register maps, constraints, and design documentation
• Support hardware/software integration and bring-up of FPGA-based prototypes and platforms
• Contribute to architectural and design decisions for next-generation AI inference systems

Advantages

• Familiarity with neural network architectures %28CNNs, Transformers%29 and how their operators map to hardware
• Experience with quantization-aware flows or low-precision inference frameworks
• Experience with performance modeling of compute arrays %28utilization, throughput, memory bandwidth%29
• Embedded software development on FPGA %28bare-metal, FreeRTOS, Yocto%29 in C/C++, including HW/SW co-design %28DMA, interrupts, register maps%29
• Experience with simulation-based verification %28UVM or cocotb%29 and lab debug tools %28ILA/SignalTap%29