- מיקום
- מרכז
- היקף משרה
- משרה מלאה
- תפקיד
- מהנדס/ת חומרה ואלקטרוניקה
תיאור המשרה
At our Holon site, we are looking for a Verification Team Leader to lead a team of Verification Engineers within our advanced FPGA Systems Development Group.
This role combines technological leadership, team management, and hands-on technical work, with responsibility for defining the verification strategy, establishing verification methodologies, driving AI adoption within the verification environment, and leading the verification process throughout the entire development lifecycle.
Key Responsibilities:
Lead a team of experienced Verification EngineersLead the development of UVM-based verification environments for complex FPGA systemsDrive the end-to-end verification process, from requirements definition through signoff, at both Block-Level and System-LevelWork closely with Design, Architecture, Algorithm, System Engineering, and Integration teamsDefine and lead verification strategies, automation initiatives, and continuous improvement of verification methodologiesIntroduce and implement AI-driven workflows and tools within the verification environmentManage multiple projects simultaneously, prioritize tasks, and ensure successful execution against development objectives and schedules
Requirements:
B.Sc. in Electrical Engineering, Computer Science, or a related fieldAt least 8 years of experience in Verification EngineeringStrong hands-on experience with SystemVerilog and UVM methodologiesProven experience leading Verification teamsExperience performing verification from Block-Level through System-LevelBroad system-level perspective and strong understanding of FPGA development processesAbility to manage multiple projects and priorities in a dynamic environmentExcellent leadership, communication, and presentation skillsFast learner with the ability to adopt new technologies and methodologies
*Only suitable candidates will be contacted#Holon
This role combines technological leadership, team management, and hands-on technical work, with responsibility for defining the verification strategy, establishing verification methodologies, driving AI adoption within the verification environment, and leading the verification process throughout the entire development lifecycle.
Key Responsibilities:
Lead a team of experienced Verification EngineersLead the development of UVM-based verification environments for complex FPGA systemsDrive the end-to-end verification process, from requirements definition through signoff, at both Block-Level and System-LevelWork closely with Design, Architecture, Algorithm, System Engineering, and Integration teamsDefine and lead verification strategies, automation initiatives, and continuous improvement of verification methodologiesIntroduce and implement AI-driven workflows and tools within the verification environmentManage multiple projects simultaneously, prioritize tasks, and ensure successful execution against development objectives and schedules
Requirements:
B.Sc. in Electrical Engineering, Computer Science, or a related fieldAt least 8 years of experience in Verification EngineeringStrong hands-on experience with SystemVerilog and UVM methodologiesProven experience leading Verification teamsExperience performing verification from Block-Level through System-LevelBroad system-level perspective and strong understanding of FPGA development processesAbility to manage multiple projects and priorities in a dynamic environmentExcellent leadership, communication, and presentation skillsFast learner with the ability to adopt new technologies and methodologies
*Only suitable candidates will be contacted#Holon
